Push-back junction isolation semiconductor structure and method

Details Push-back junction isolation semiconductor structure and method Push-back junction isolation semiconductor structure and method

1991-08-01

1993-01-26

Fourson, George

Fishing, trapping, and vermin destroying

437 75, 437 76, 437149, 437150, 437154, 437956, 437958, 148DIG36, H01L 21265

Patent

active

051822199

ABSTRACT:
The surface area of a junction-isolated tub in a silicon epitaxial layer grown on a silicon substrate is increased by introducing dopant into surface portions of the tub to effectively push back the junction between the tub and the isolation region. The junction-isolation region surrounding the tub typically has a dopant concentration profile which decreases from the center of the junction-isolation region towards the junction with the tub. By increasing the surface concentration of dopant in the tube, the net dopant concentration of peripheral portions of the junction-isolation region is converted, thereby effectively increasing the size of the surface of the tub. The dopant concentration in the surface of the entire tub can be increased, or only the periphery of the tub can have increased dopant concentration, thereby maintaining the breakdown voltage of devices fabricated in the tub.

REFERENCES:
patent: 3370995 (1968-02-01), Lowery et al.
patent: 3653988 (1972-04-01), Glinski et al.
patent: 3694705 (1972-09-01), Wenzig
patent: 3711940 (1973-01-01), Allison et al.
patent: 3921199 (1975-11-01), Yuan et al.
patent: 4283236 (1981-08-01), Sirsi
IBM Technical Disclosure Bulletin 15(3) Aug, 1972 Compensating for the Depletion of Boron Produced in NPN Bipolar transistors B. L. Crowder and J. F. Ziegler.

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