Pulsed flip-flop circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S210000

Reexamination Certificate

active

08063685

ABSTRACT:
A flip-flop circuit includes a data input, a clock input for receiving a clock signal having active edges and inactive edges, a data output, an input circuit, a pulse generator, and a latch. The input circuit sets first and second nodes to different initial logic states in response to an inactive edge of the clock signal, and selectively changes the logic state of either the first node or the second node in response to a pulse input signal to control the state of a third node, such that the selection depends on the logic state of the data input. The pulse generator circuit enables the pulse input signal in response to an active edge of the clock signal, and disables the pulse input signal in response to detecting the change in the initial logic state of either the first node or the second node. The latch stores a data output signal for output at the data output, the data output signal depending on the logic state of the third node.

REFERENCES:
patent: 5557225 (1996-09-01), Denham
patent: 6064246 (2000-05-01), Endo
patent: 6608513 (2003-08-01), Tschanz
patent: 6753715 (2004-06-01), Oklobdzija
patent: 7154319 (2006-12-01), Kim
patent: 7180350 (2007-02-01), Hsieh
patent: 2007/0146032 (2007-06-01), Sedlak
patent: 2008/0116953 (2008-05-01), Hirata et al.
patent: 2010/0308864 (2010-12-01), Lee et al.

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