Pulse width modulation controller having frequency...

Details Pulse width modulation controller having frequency... Pulse width modulation controller having frequency...

2001-08-15

2003-07-22

Berhane, Adolf Deneke (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S284000

Reexamination Certificate

active

06597159

ABSTRACT:

FIELD OF INVENTION
The present invention relates to a switching mode power supply, and more particularly to the pulse width modulation (PWM) of the switching mode power supply.
BACKGROUND OF THE INVENTION
The PWM is a traditional technology used in switching mode power supply to control the output power and achieve the regulation. Most electronic equipments, such as TV, computer, printer, etc., are using the PWM power supply. Based on the restriction of environmental pollution, computers and other equipment manufactures have been striving to meet the power management and energy conservation requirements. The principle of power management is to manage the system to consume power only during its operation, and very little power will be consumed during non-operation (sleep mode). A PWM-control integrated circuit, 3842 family, has been widely used for the power supply in the last decade. It includes 3842, 3843, 3844 and 3845, which build in necessary features to implement a switching power supply. However, it does not include the function of saving energy. With respect to the power supply in a power management application, how to save the power in the no load or light load conditions is a major requirement. Through the frequency modulation in PWM control, this invention reduces power consumption in light load and no load conditions.
FIG. 1
shows a circuit schematic of the flyback power supply that includes a 3842 PWM controller
100
. A transistor
300
switches a transformer
400
. A time constant resistor
210
and capacitor
260
assign the switching frequency for variance of applications. When the transistor
300
is turned off, the leakage inductance of transformer
400
keeps the current, which has been flowing in it constantly for some short time. The part that current continues to flow into the slowly off-switching transistor
300
and the rest of that current flows into a capacitor
275
through a diode
310
. A resistor
235
dissipates the energy that is charged in the capacitor
275
. The diode
310
, resistor
235
, and capacitor
275
form a clamp circuit to reduce the leakage inductance spike and avoid the transistor
300
breakdown. At the instance of transistor
300
is switched on, an output rectifier
320
is switched off, and there is an exponentially decaying oscillation or ‘ring’ will come out. The ring is at a frequency determined by the inherent capacity of the off-switching rectifier
320
and the value of secondary inductance of the transformer
400
. The amplitude and duration of the ring are determined by the output current and the reverse recovery times of the rectifier
320
. The ring will cause RFI problem and can easily be eliminated by a snubber resistor
240
and a snubber capacitor
280
across the output rectifier
320
. The major factors affecting the loss of the power conversion in the light load condition are listed as below:
(1) The switching loss of the transistor
300
, P
Q
can be expressed
(t
ol
/T)(∫
0
tol
V
Q
×Ip dt),
or
P
Q
=Fs×t
ol
×(∫
0
tol
V
Q
×Ip dt
),
 where T is switching period, Fs is the switching frequency and t
ol
is the duration of overlap of voltage V
Q
and current Ip. Ip is the primary current of the transformer
400
and V
Q
is the voltage across the transistor
300
.
(2) The switching loss of output rectifier
320
and
330
, P
D
can be expressed
(t
rr
/T)(∫
0
trr
Vd×Id dt),
or
P
D
=Fs×t
rr
×(∫
0
trr
Vd×Id dt
),
 where t
rr
is the reverse recovery time of the rectifier. The Vd is the voltage across the rectifier when it is switch-off. Id is limited by the secondary inductance of the transformer
400
.
(3) The core loss of transformer
400
, P
T
, it is proportional to flux density Bm, core volume Vv and the switching frequency Fs.
P
T
=K
0
×Bm×Vv×Fs,
 where K
0
is a constant.
(4) The power loss of snubber, P
R
is stated as
P
R
=(½)×
C×Vd
2
×Fs,
 where C is the capacitance of the snubber, such as capacitor
280
.
(5) The power loss of leakage inductance, P
L
can be stated by
P
L
=(½)×
Lt×Ip
2
×Fs,
 where the Lt is the primary leakage inductance of transformer
400
. The resistor
235
dissipates the energy that is produced by the Lt.
We can find that all of the losses are in direct proportion to the switching frequency Fs. However the power supply is designed to operate in a higher frequency to shrink the size, especially the volume of the transformer. To prevent the saturation of the transformer, the voltage-time ratio (Vin×Ton) has to be managed to limit the flux density Bm of the transformer.
Bm=
(
Vin×Ton
)/(
Np×Ae
),
where Vin is the input voltage of the power supply, Ton is the turn-on time, Np is the primary turn number of the transformer, Ae is the cross of the transformer. The value of (Np×Ae) represents the size of the transformer. A higher frequency can earn a lower maximum Ton and a smaller transformer.
Take the flyback power supply as an example; the output power Po is equal to (½T)×Lp×Ip
2
, where Lp is the primary inductance of the transformer
400
. Since Ip=(Vin/Lp)×Ton, it can be seen quantitatively as
Po=
(
Vin
2
×Ton
2
)/(2
×Lp×T
).
This is seen from that equation, during the light load condition, Ton is short and obviously allows us to widen the T (lower the Fs). The power consumption of the power supply is dramatically reduced in response to the decrease of the switching frequency Fs in the light load condition and no load condition.
FIG. 2
shows the circuit schematic of 3842 PWM-controller. The resistor
210
in
FIG. 1
is connected from pin V
RC
to a reference voltage V
REF
and the capacitor
260
in pin V
RC
is connected to ground.
FIG. 3
displays the waveform for the circuit in FIG.
2
. The voltage across capacitor
260
is charged and reaches the trip-point of the comparator
10
(trip-point voltage Vx). The comparator
10
and the NAND gates
17
,
18
will generate a discharge signal Vp to turn on the transistor
23
that discharges the capacitor
260
via a constant current sink
24
. The phenomenal of the discharge is continuous until the voltage of capacitor
260
lower than the low-point voltage Vy, in which a comparator
11
is enabled. The resistor
210
, capacitor
260
, comparators
10
,
11
, current sink
24
, transistor
23
, and NAND gates
17
,
18
form an oscillator and generate a constant frequency signal to clock on the flip-flop
20
. The comparator
12
resets the flip-flop
20
when the voltage in the pin Vs is higher than the feedback signal V
FB
. The resistor
230
converts the current information of the transformer
400
to a voltage signal, which is a ramp signal, and the input voltage Vin and the inductance of transformer
400
determine its slope
V
R230
=R
230
×(
Vin×Ton
)/Lp.
The voltage in resistor
230
, V
R230
, is inputted to the pin Vs via the filter of a resistor
225
and a capacitor
270
. The feedback signal V
FB
is derived from the output of an error amplifier
14
, which is attenuated by resistors R
A
, R
B
and the level shift diodes
21
,
22
. The voltage level of the V
FB
is dominantly decided by the output power through the control of voltage feedback loop. The discharge time of capacitor
260
, which can be demonstrated by Vp when it is high, determines the dead time of the PWM signal
39
that decides the maximum duty cycle of PWM controller
100
. The PWM signal will be switched off as long as the voltage of Vs is higher than V
FB
, thus the maximum V
FB
is set as 1V to limit the maximum output power. Since a higher power will be output in response to a higher Vin when Vs>1V, a resistor
220
is connected from Vin to pin Vs to compensate the limit for over-power conditions. The compensation added to the pin Vs causes the voltage of V
FB
to increase automatically through the voltage feedback loop to keep the same Ton and the sam

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