Pulse width modulation circuit and multiphase clock...

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

Reexamination Certificate

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Details

C331S016000, C331S045000, C332S109000

Reexamination Certificate

active

07394319

ABSTRACT:
A pulse width modulation circuit comprises a multiphase clock generation section which generates multiphase clock signals based on a reference clock, and a pulse width modulation signal generation section which generates pulse width modulation signals based on input data and on multiphase clock signals generated by the multiphase clock generation section. The multiphase clock generation section has a phase-locked loop circuit and a clock selection circuit which selects an arbitrary clock signal from among the multiphase clock signals and outputs the selected clock signal to the phase-locked loop circuit as a feedback clock.

REFERENCES:
patent: 6888412 (2005-05-01), Kim et al.
patent: 2004/0257124 (2004-12-01), Araki et al.
patent: 2006/0001467 (2006-01-01), Fujino et al.
patent: 56-69929 (1981-06-01), None
patent: 6-177723 (1994-06-01), None
patent: 2001-339280 (2001-12-01), None
patent: 3512676 (2004-01-01), None

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