Pulse width detecting circuit and PLL synthesizer circuit using

Details Pulse width detecting circuit and PLL synthesizer circuit using Pulse width detecting circuit and PLL synthesizer circuit using

1992-07-23

1993-02-23

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

307526, 307234, 328134, 331DIG2, H03K 526, H03L 706, H03L 718

Patent

active

051893797

ABSTRACT:
A PLL synthesizer circuit includes a reference frequency generator for generating a reference frequency signal and a reference clock signal, a phase comparator for comparing a phase of the reference frequency signal with an output signal and for outputting a phase difference signal having a pulse form, and a voltage-controlled oscillation device for generating the output signal having a frequency dependent on the phase difference signal. The PLL synthesizer circuit also includes a phase lock detecting circuit for determining whether or not the phase difference signal has a pulse width in which the reference clock signal successively changes n times (n is numeral equal to or greater than 2) and for outputting a phase lock detection signal representing that the PLL synthesizer circuit is in a phase-locked state when it is determined that the reference clock signal does not successively change n times in the pulse width of the phase difference signal. There is also provided a pulse width detecting circuit suitable for application of a phase lock/unlock detection in a PLL synthesizer.

REFERENCES:
patent: 4122405 (1978-10-01), Tietz et al.
patent: 4408333 (1983-10-01), Fujii
patent: 4437072 (1984-03-01), Asami
patent: 4692710 (1987-09-01), Shvartsman

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