Pulse or digital communications – Repeaters – Testing
Patent
1990-02-14
1992-03-03
Olms, Douglas W.
Pulse or digital communications
Repeaters
Testing
342 46, 329313, H03K 908
Patent
active
050938444
ABSTRACT:
A circuit for filtering pulse sequences of a given frequency out of a composite signal includes a series combination of a monostable multivibrator (MF) and a random-access memory (RAM), an address register and a clock. The monostable multivibrator (MF) serves as a pulse shaper of incoming signals. The input (D.sub.E) and output (D.sub.A) of the random-access memory (RAM) are connected to the inputs of an AND gate (UG). An address counter register (AR) associated with the random-access memory (RAM) has a count cycle whose duration is equal to the pulse spacing of the sequence to be recognized. During each clock period (T2), the current signal state of the input (D.sub.E) of the random-access memory (RAM) and the content of the addressed memory cell are checked for equality by the AND gate (UG) and the current signal state is then written into the cell.
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Olms Douglas W.
Smith Ralph
Standard Elektrik Lorenz Aktiengesellschaft
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