Pulse rejection and duration correction circuit

Details Pulse rejection and duration correction circuit Pulse rejection and duration correction circuit

1979-05-29

1981-05-05

Konick, Bernard

179 1P, 328164, 328165, H04M 174, H03K 513

Patent

active

042660998

ABSTRACT:
A circuit which is particularly adapted for reconstructing fixed time duration dialing pulses in a telephone communications system while rejecting spurious pulses of less than a selected pulse duration. The circuit utilizes two coupling networks having integrated outputs of opposite polarity which are summed after passing through two separate switching amplifiers. The summed outputs are fed through a third switching amplifier having a hysteresis characteristic so that it switches only when both outputs have switched to the same polarity.

REFERENCES:
patent: 3822385 (1974-07-01), Kayalioglu
patent: 3889197 (1975-06-01), Duff
patent: 4071781 (1978-01-01), Kayalioglu
patent: 4086538 (1978-04-01), Foreman
patent: 4153848 (1979-05-01), Miyazaki

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