Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2008-07-01
2008-07-01
Andujar, Leonardo (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S049000, C257S066000, C257SE27111
Reexamination Certificate
active
07394102
ABSTRACT:
A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD−V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD. When SP becomes low level; CK3becomes low level; and CK1becomes high level, the potential at the signal output section (Out) becomes low level again.
REFERENCES:
patent: 3506851 (1970-04-01), Polkinghorn et al.
patent: 3774055 (1973-11-01), Bapat
patent: 3898479 (1975-08-01), Proebsting
patent: 4090096 (1978-05-01), Nagami
patent: 4390803 (1983-06-01), Koike
patent: 4412139 (1983-10-01), Horninger
patent: 4633105 (1986-12-01), Tsujimoto
patent: 4804870 (1989-02-01), Mahmud
patent: 4929911 (1990-05-01), Davies et al.
patent: 4958085 (1990-09-01), Hashimoto et al.
patent: 4959697 (1990-09-01), Shier et al.
patent: 5001359 (1991-03-01), Hashimoto et al.
patent: 5229709 (1993-07-01), Pfennings
patent: 5467038 (1995-11-01), Motley et al.
patent: 5548143 (1996-08-01), Lee
patent: 5643826 (1997-07-01), Ohtani et al.
patent: 5694061 (1997-12-01), Morosawa et al.
patent: 5870071 (1999-02-01), Kawahata
patent: 5889291 (1999-03-01), Koyama et al.
patent: 5949271 (1999-09-01), Fujikura
patent: 5952991 (1999-09-01), Akiyama
patent: 6040810 (2000-03-01), Nishimura
patent: 6049228 (2000-04-01), Moon
patent: 6064713 (2000-05-01), Lebrun et al.
patent: 6091393 (2000-07-01), Park
patent: 6384804 (2002-05-01), Dodabalapur et al.
patent: 6392628 (2002-05-01), Yamazaki et al.
patent: 6501098 (2002-12-01), Yamazaki
patent: 6522323 (2003-02-01), Sasaki et al.
patent: 6542138 (2003-04-01), Shannon et al.
patent: 6686899 (2004-02-01), Miyazawa et al.
patent: 6714183 (2004-03-01), Yamazaki et al.
patent: 6765552 (2004-07-01), Yamazaki et al.
patent: 6813332 (2004-11-01), Nagao et al.
patent: 6930666 (2005-08-01), Miyazawa et al.
patent: 2001/0002703 (2001-06-01), Koyama
patent: 2001/0045565 (2001-11-01), Yamazaki
patent: 2002/0011973 (2002-01-01), Komiya
patent: 2002/0044208 (2002-04-01), Yamazaki et al.
patent: 2002/0097212 (2002-07-01), Miyazawa et al.
patent: 2002/0158666 (2002-10-01), Azami et al.
patent: 2002/0167026 (2002-11-01), Azami et al.
patent: 2002/0190326 (2002-12-01), Nagao et al.
patent: 2003/0011584 (2003-01-01), Azami et al.
patent: 2003/0020520 (2003-01-01), Miyaki et al.
patent: 2003/0034806 (2003-02-01), Azami
patent: 2003/0052324 (2003-03-01), Kimura
patent: 2003/0111677 (2003-06-01), Miyake
patent: 0 315 362 (1989-05-01), None
patent: 1 020 839 (2000-07-01), None
patent: 1063630 (2000-12-01), None
patent: 1 139 326 (2001-10-01), None
patent: 55-156427 (1980-12-01), None
patent: 59-016424 (1984-01-01), None
patent: 60-140924 (1985-07-01), None
patent: 63-204815 (1988-08-01), None
patent: 64-044683 (1989-02-01), None
patent: 64-062019 (1989-03-01), None
patent: 03-165171 (1991-07-01), None
patent: 06-098081 (1994-04-01), None
patent: 09-046216 (1997-02-01), None
patent: 09-186312 (1997-07-01), None
patent: 09-246936 (1997-09-01), None
patent: 10-112645 (1998-04-01), None
patent: 2000/106617 (2000-04-01), None
patent: 2000-259111 (2000-09-01), None
patent: 2001-005426 (2001-01-01), None
patent: 2001/109394 (2001-04-01), None
patent: 2001-133431 (2001-05-01), None
patent: 2002/176162 (2002-06-01), None
patent: 2002/251164 (2002-09-01), None
patent: 2002-251174 (2002-09-01), None
US 6,646,476, 11/2003, Nagao et al. (withdrawn)
Invitation to Respond to Written Opinion with Australian Search Report and Written Opinion (Singapore Patent Application No. 200202969-2), Jun. 25, 2004, 8 pages.
Second Chinese Office Action (Application No. 200410069426.9), dated Oct. 19, 2007 with full English translation, 17 pages.
“3.5.1 CMOS Working Principle of a CMOS Inverter,” Sep. 1984, p. 89 with full English translation, 5 pages.
Azami Munehiro
Nagao Shou
Tanada Yoshifumi
Andujar Leonardo
Fish & Richardson P.C.
Quinto Kevin
Semiconductor Energy Laboratory Co,. Ltd.
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