Pulse level correcting circuit

Details Pulse level correcting circuit Pulse level correcting circuit

1973-09-05

1976-03-23

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307DIG1, 328171, H03K 508

Patent

active

039462510

ABSTRACT:
A pulse level correcting circuit wherein a resistance is interposed between the input and output sides, and a branch line including a switching element is disposed between an output terminal and a reference voltage terminal, the switching element being adapted to cause a current to flow through the resistance when the level of an input pulse is on the ground level side, whereby the level of the input pulse is corrected by the voltage drop across the resistance at the current flow.

REFERENCES:
patent: 3117287 (1964-01-01), Damico
patent: 3205458 (1965-09-01), Geery
patent: 3428746 (1969-02-01), Graf
patent: 3535549 (1970-10-01), Herrero
patent: 3588525 (1971-06-01), Hatsukano
patent: 3621284 (1971-11-01), Cluett
patent: 3636385 (1972-01-01), Koepp
patent: 3693029 (1972-09-01), Niven, Jr.
patent: 3699357 (1972-10-01), Lloyd
patent: 3746946 (1973-07-01), Clark
patent: 3774053 (1973-11-01), Carlson
Buhler, "Clamp Circuit", IBM, Tech. Discl. Bull., Vol. 13, No. 8, p. 2251, 1/1971.

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