Pulse insertion circuit

Details Pulse insertion circuit Pulse insertion circuit

1989-03-15

1991-05-07

Safourek, Benedict V.

Multiplex communications

Wide area network

Packet switching

3701001, 3701053, 375118, H04J 306

Patent

active

050142712

ABSTRACT:
A pulse insertion circuit alternately distributes serial input data at a predetermined data clocking rate into first and second parallel input data, which are synchronously and simultaneously written into and read from a memory, the second input data as read being delayed by one bit. A selection means selects between the second input data and the one-bit delayed second input data and further switches between and establishes either a direct or a cross connection between the selected one of the second input data, as read or as delayed, and the first input data and the first and second output terminals thereof, at which there are produced, correspondingly, parallel and selected, first and second input data. A control means responds to a pulse insertion request to inhibit memory read-out by one read clock period and to control the switching means selectively to switch between the direct and cross-connections, the pulse addition being made to one of the parallel and selected, first and second input data, as specified by the pulse insertion request. Pulse insertion thus is performed at one-half the predetermined clocking rate, the selected and parallel, first and second input data with the required pulse inserted in the specified one thereof, thereafter being multiplexed and transmitted at the predetermined clocking rate.

REFERENCES:
patent: 4580279 (1986-04-01), Kahn
patent: 4730346 (1988-03-01), Jiang
patent: 4748623 (1988-05-01), Fujimoto
patent: 4755971 (1988-07-01), Jasmer
patent: 4791652 (1988-12-01), McEachern et al.
patent: 4811367 (1989-03-01), Tajika

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