Pulse generator and continuous-time sigma-delta modulator

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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Details

C341S152000

Reexamination Certificate

active

07961128

ABSTRACT:
Provided is a clock generator employed in a continuous-time sigma-delta modulator. The clock generator includes an oscillator configured to generate pulses in response to an enable signal, a counter configured to count the number of pulses generated by the oscillator and output the total pulse count, and an output circuit configured to output an inactivated output signal if the pulse count of the counter is equal to a pulse-width control bit. The oscillator includes an astable multi-vibrator. Since the astable multi-vibrator capable of generating a low-jitter pulse from a jittered clock is used as the oscillator, a signal-to-noise ratio is improved. A simple configuration using only digital circuits makes it easier to design a circuit and adjust pulse width. Moreover, according to the structure of the astable multi-vibrator, it is possible to design a circuit to optimally modulate pulse width in connection with process variations of resistors and capacitors used in the continuous-time sigma-delta modulator.

REFERENCES:
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patent: 7315269 (2008-01-01), Schreier et al.
patent: 7379005 (2008-05-01), Wiesbauer et al.
patent: 7397291 (2008-07-01), Parkes, Jr. et al.
patent: 2007/0164884 (2007-07-01), Ihs
patent: 1538752 (2005-06-01), None
patent: 1020080064378 (2008-07-01), None
patent: WO 98/54840 (1998-12-01), None
Khiem Nguyen et al., “A 106-dB SNR Hybrid Oversampling Analog-to-Digital Converter for Digital Audio,” IEEE Journal of Solid-State Circuits, Dec. 2005, pp. 2408-2415, vol. 40, No. 12.

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