Pulse generation circuit

Details Pulse generation circuit Pulse generation circuit

2005-12-29

2008-11-04

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S112000

Reexamination Certificate

active

07446589

ABSTRACT:
Pulse generation circuit has a P-MOS transistor having a drain electrode connected to a first power source; a first N-MOS transistor having a drain electrode connected to the source electrode of the P-MOS transistor; a second N-MOS transistor having a drain electrode connected to the source electrode of the first N-MOS transistor, a gate electrode receiving an input pulse signal, and a source electrode connected to the second power source; a delay circuit having an input terminal connected to the source electrode of the P-MOS transistor and the drain electrode of the first N-MOS transistor and an output terminal connected to gate electrode of the P-MOS transistor and gate electrode of the first N-MOS transistor; an inverter input connected to the source electrode of the P-MOS transistor and the drain electrode of the second N-MOS transistor for outputting a generated pulse; and a keeper keeping voltage level to the inverter.

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Notice of Reason for Rejection issued Feb. 5, 2008 in Japanese Patent Application No. 2005-507745 (2 pages) (2 pages of English translation).

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