Pulse generating circuit with clock pulse ceasing feature

Details Pulse generating circuit with clock pulse ceasing feature Pulse generating circuit with clock pulse ceasing feature

1980-09-15

1982-10-05

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 58, 328 61, 307270, 307442, 365 1, H03K 505, H03K 1332

Patent

active

043529950

ABSTRACT:
A pulse generating circuit in ises a clock ceasing detecting circuit and a logic circuit which receives the output of one of the decoders and the output of the detecting circuit. The flip-flop circuit is cleared by the output of the detecting circuit through the logic circuit when the clock signal is ceased by accident.

REFERENCES:
patent: 3697879 (1972-10-01), Holliday
patent: 3840815 (1974-10-01), Masters
patent: 4079326 (1978-03-01), Williams et al.
patent: 4141376 (1979-02-01), Frey
Magnetic Bubble Memory Interface Application Notes TIB0203/5, Chevron Design published by Texas Instruments Inc., Jun. 1, 1978.

Affiliated with

Also associated with

Rating

Pulse generating circuit with clock pulse ceasing feature does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pulse generating circuit with clock pulse ceasing feature, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pulse generating circuit with clock pulse ceasing feature will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-424526