Pulse extending circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

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Details

327552, 327 34, 327166, 327174, H03K 500, H03K 3017

Patent

active

060160705

ABSTRACT:
The present invention provides a timing circuit for outputting a signal having an amplified pulse width when a signal having a normal pulse width is inputted thereto, characterized in that when glitch noise whose pulse width is small, is inputted to the timing circuit, a signal having a waveform corresponding to the pulse width thereof is outputted from the timing circuit. The timing circuit comprises a first delay circuit whose input is connected to an input terminal, a first NAND circuit having a first input terminal connected to the first delay circuit and a second input terminal connected to the input terminal, a second delay circuit whose input is connected to the output of the NAND circuit, an inverter whose input is connected to the input terminal, and a second NAND circuit having a first input terminal connected to the output of the second delay circuit and a second input terminal connected to the output of the inverter.

REFERENCES:
patent: 5672990 (1997-09-01), Chaw
patent: 5682113 (1997-10-01), Park et al.
"CMOS Delay Circuit", IBM Technical Disclosure Bulletin, vol. 27, No. 12, May 1985, pp. 7134-7135.

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