Pulse driver

Static information storage and retrieval – Addressing – Sync/clocking

Patent

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Details

365194, 327161, 327164, G11C 800

Patent

active

060495049

ABSTRACT:
An inventive pulse driver transmits a pulse signal in a high speed when the pulse signal is coupled thereto. For the purpose, the pulse driver comprises a first and a second CMOS inverters connected in series, a first inverting delay unit for delaying and phase-shifting an input signal coupled to the first CMOS inverter, a first regulating device, connected to an output terminal of the first CMOS inverter, for adjusting the output signal of the first CMOS inverter in response to an output signal of the first inverting delay unit, a second inverting delay unit for delaying and phase-shifting a signal which is outputted from the first CMOS inverter and inputted to the second CMOS inverter and a second regulating device, connected to the output terminal of the second CMOS inverter, for adjusting the output signal of the second CMOS inverter responsive to an output signal of the second inverting delay unit. Therefore, the pulse driver can drive a pulse signal in a high speed as twice as a conventional pulse driver. In addition, when the pulse driver is adopted to a clock driver, it can be advantageously applied to a delay lock loop (DLL) circuit since there is less change of delay.

REFERENCES:
patent: 4701884 (1987-10-01), Aoki et al.
patent: 4811285 (1989-03-01), Walker et al.
patent: 5521878 (1996-05-01), Ohtani et al.
patent: 5546355 (1996-08-01), Raatz et al.
patent: 5546569 (1996-08-01), Proebsting et al.
patent: 5664538 (1997-09-01), Merritt
patent: 5940336 (1999-08-01), Lee

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