Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Patent
1993-09-30
1994-09-13
Young, Brian K.
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
H03M 302
Patent
active
053472780
ABSTRACT:
A method for mapping the serial 0 and 1 pulses received at a known clock rate from a delta sigma modulator All 0's are generated at the output when no 11 pairs are present in the input signal during the sampled clock periods. A 1 is generated at the output responsive to the input signal and the input signal delayed by one clock period both being 1's when no 00 pairs are present in the input signal during the sampled clock periods. A 1 is generated at the output for each 11 pair not balanced by a 00 pair when 11 and 00 pairs are serially alternating in the input signal during the sampled clock periods. According to this mapping method, the pulse density of 1's in the output signal increases only responsive to an increase in the net number of 11 pairs in the input signal during the sampled clock periods. A circuit for implementing this pulse mapping method is also described.
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Oversampled Sigma-Delta Modulation, Robert M. Gray, Reprinted from IEEE Trans. Commun., vol. COM-35, pp. 481-489, May 1987.
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Oversampling Methods for A/D and D/A Conversion, James C. Candy and Gabor C. Temes, pp. 1-25, 1992.
Callahan Kent R.
Kemp Christopher J.
Dixon Richard D.
Ford Motor Company
May Roger L.
Young Brian K.
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