Pull-in circuit for a digital phase locked loop

Details Pull-in circuit for a digital phase locked loop Pull-in circuit for a digital phase locked loop

1981-12-04

1984-04-24

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

307516, 328133, H03L 706

Patent

active

044452241

ABSTRACT:
The present invention relates to a digital phase locked loop circuit, particularly to a circuit which realizes accurately digital phase locked loop pull-in operation at a high speed with a simplified circuit structure.
In the present invention, in order to obtain a phase difference between a single frequency signal and the digital phase locked loop clock signal which is obtained by dividing a specified frequency signal with a dividing counter, the phase difference is obtained in accordance with the signs, absolute values and amplitude ratio of two adjacent sample values. The sample values of said single frequency signal are taken at two points based on said digital phase locked loop clock signal corresponding to a phase difference of .pi./2 radians of said single frequency signal. A fast pull-in of the digital phase locked loop is realized by setting a value corresponding to the obtained phase difference into a dividing counter.

REFERENCES:
patent: 4338574 (1982-07-01), Fujita et al.
patent: 4339731 (1982-07-01), Adams
patent: 4355284 (1982-10-01), Acker

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