Etching a substrate: processes – Forming or treating an article whose final configuration has...
Reexamination Certificate
2006-03-28
2006-03-28
Norton, Nadine G. (Department: 1765)
Etching a substrate: processes
Forming or treating an article whose final configuration has...
C438S157000, C438S164000, C438S284000, C438S696000, C257S365000, C257S401000
Reexamination Certificate
active
07018551
ABSTRACT:
A method of forming integrated circuits having FinFET transistors includes a method of forming sub-lithographic fins, in which a mask defining a block of silicon including a pair of fins in reduced in width or pulled back by the thickness of one fin on each side, after which a second mask is formed around the first mask, so that after the first mask is removed, an aperture remains in the second mask having the width of the separation distance between the pair of fins. When the silicon is etched through the aperture, the fins are protected by the second mask, thereby defining fin thickness by the pullback step. An alternative method uses lithography of opposite polarity, first defining the central etch aperture between the two fins lithographically, then expanding the width of the aperture by a pullback step, so that filling the widened aperture with an etch-resistant plug defines the outer edges of the pair of fins, thereby setting the fin width without an alignment kstep.
REFERENCES:
patent: 6391782 (2002-05-01), Yu
patent: 6417047 (2002-07-01), Isobe
patent: 2004/0266076 (2004-12-01), Doris et al.
Beintner Jochen C.
Chidambarrao Dureseti
Li Yu-jun
Settlemyer, Jr. Kenneth T.
International Business Machines - Corporation
Norton Nadine G.
Petraske Eric W.
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