PSK demodulator using time-to-digital converter

Details PSK demodulator using time-to-digital converter PSK demodulator using time-to-digital converter

2011-08-09

2011-08-09

Chang, Joseph (Department: 2817)

Demodulators

Phase shift keying or quadrature amplitude demodulator

Including logic element

C329S304000

Reexamination Certificate

active

07994851

ABSTRACT:
A PSK demodulator using a time-to-digital converter includes: a filter unit that performs band pass filtering on a PSK signal; an amplitude limiting unit that limits the amplitude of an output signal of the filter unit; a clock signal generating unit that generates a clock signal; and a time-to-digital converter that samples the phase of an output signal of the amplitude limiting unit according to the clock signal and outputs a digital signal having a value corresponding to the phase of the PSK signal. Power consumption can be reduced and a circuit implementation can be simplified.

REFERENCES:
patent: 5121070 (1992-06-01), Tomita
patent: 5436591 (1995-07-01), Henze
patent: 5777511 (1998-07-01), Masumoto et al.
patent: 6341146 (2002-01-01), Johnson et al.
patent: 6914478 (2005-07-01), Takasu et al.
patent: 7079600 (2006-07-01), Byun et al.
patent: 2008/0129574 (2008-06-01), Choi et al.
Aarno Pärssinen, “A 2GHz Wideband Direct Conversion Receiver for WCDMA Applications,” IEEE Journal of Solid-State Circuits, 1999, pp. 1893-1903, vol. 34, No. 12, IEEE.

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