Pseudo-random bit sequence (PRBS) synchronization for...

Pulse or digital communications – Spread spectrum

Reexamination Certificate

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C375S142000, C375S143000

Reexamination Certificate

active

07492807

ABSTRACT:
A method for synchronizing interconnects in a link system according to various embodiments can include receiving input data at a transmit side, the transmit side including at least one pseudo-random bit sequence scrambler; scrambling the input data at the transmit side via the pseudo-random bit scrambler with dual tap sequences resulting in scrambled data; transmitting the scrambled data with the dual tap sequences along all lanes of a plurality of lanes to a receive side via a bus interconnecting the plurality of lanes, the receive side including at least one pseudo-random bit sequence descrambler; synchronizing the at least one pseudo-random bit sequence scrambler to the at least one pseudo-random bit sequence descrambler; using an edge detection or transition detection device for synchronization of the descrambler to the scrambler; and de-scrambling the transmitted scrambled data at the receive side resulting in the input data.

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patent: 6999544 (2006-02-01), Cranford, Jr. et al.
patent: 2004/0114670 (2004-06-01), Cranford, Jr. et al.
patent: 2005/0025191 (2005-02-01), Vila et al.
patent: 2005/0047512 (2005-03-01), Neff et al.
patent: 2006/0236183 (2006-10-01), Zerbe et al.
patent: 2007/0008991 (2007-01-01), Sridharan et al.
patent: 2007/0165698 (2007-07-01), Haque et al.
patent: 2008/0130891 (2008-06-01), Sun et al.

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