Pseudo-random binary sequence checker with automatic...

Details Pseudo-random binary sequence checker with automatic... Pseudo-random binary sequence checker with automatic...

2007-05-15

2007-05-15

Malzahn, D. H. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

10605381

ABSTRACT:
A pseudo-random binary sequence checker having automatic synchronization is disclosed. The pseudo-random binary sequence checker includes a receiver, a synchronizer, and a comparator. The receiver is capable of receiving a pseudo-random binary sequence, which is generated by a pseudo-random binary sequence generator, in a parallel fashion n bits at a time. The synchronizer automatically synchronizes the state of the receiver with an n-bit sample within the pseudo-random binary sequence and calculate all subsequent n-bit sample within the pseudo-random binary sequence. The comparator compares the subsequent calculated n-bit sample within the pseudo-random binary sequence to the next subsequent next received n-bit sample within the pseudo-random binary sequence to indicate an error condition has occurred if each calculated n-bit sample within the pseudo-random binary sequence does not equal to the corresponding received n-bit sample within the pseudo-random binary sequence.

REFERENCES:
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patent: 6002714 (1999-12-01), Huscroft
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patent: 6393594 (2002-05-01), Anderson et al.
patent: 6490317 (2002-12-01), Huscroft

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