Pseudo-dynamic differential flip-flop

Details Pseudo-dynamic differential flip-flop Pseudo-dynamic differential flip-flop

1998-12-04

2000-10-31

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

327199, 327212, 327202, 327215, G01R 1900, G11C 700, H03F 345

Patent

active

06140845&

ABSTRACT:
A differential flip-flop having reduced circuit complexity, clock loading, and power consumption. The circuit is particularly well adapted for systems requiring high-speed differential flip-flops. The proposed flip-flop uses the parasitic capacitors associated with circuit nodes to dynamically store information. The differential flip-flop uses only one current source, as opposed to the two typically required by its conventional counterpart, saving fifty percent of the total power requirement. This power saving is a tremendous advantage at high frequencies, since current must be high to ensure high-speed operation of the transistors in the circuit. Furthermore, the new flip-flop presents a significantly reduced (fifty percent) load to the clock driver, thus further enhancing the power performance of the systems in which it is used.

REFERENCES:
patent: 4121120 (1978-10-01), Wetterling
patent: 4560888 (1985-12-01), Oida
patent: 4777388 (1988-10-01), Widener
patent: 4779009 (1988-10-01), Tsunoi et al.
patent: 5001361 (1991-03-01), Tamamura et al.
patent: 5049760 (1991-09-01), Ooms
patent: 5892382 (1999-04-01), Ueda et al.
Turgut Aytur and Behzad Razavi, Frequency Synthesizer, 1995 IEEE International Solid-State Circuits Conference, ISSCC95, Session 15, Paper FA 15.4.
Turgut Aytur and Behzad Razavi, A 2-GHz, 6-m BiCMOS Frequency Synthesizer, IEEE Journal of Solid-State Circuits, vol. 30, No. 12, Dec. 1995.

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