Pseudo-complementary decode driver

Details Pseudo-complementary decode driver Pseudo-complementary decode driver

1974-11-11

1976-07-20

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307DIG5, 307205, H03K 1908

Patent

active

039708659

ABSTRACT:
A decode driver useful in decoders for memory circuits. A plurality of transistors are connected in series between a first reference potential terminal and an output terminal. A second plurality of transistors are connected in parallel between a second reference potential terminal and the output terminal. Each of the transistors receives an input which functions to turn the transistors either on or off. The coding of the inputs determines whether the transistors to which the respective inputs are connected are turned on or off which in turn controls whether or not the output terminal is coupled to the first reference potential terminal or the second reference potential terminal.

REFERENCES:
patent: 3526783 (1970-09-01), Booher
patent: 3653034 (1972-03-01), Regitz
patent: 3702990 (1972-11-01), Ross

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