Proximity sensitive defect monitor

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S1540PB, C438S018000

Reexamination Certificate

active

07486097

ABSTRACT:
The invention relates to a method for determining processing image induced defects in the manufacture of semiconductor products such as wafers by analyzing the circuit design of the product mask and modifying a conventional test defect structure to mimic the product mask to incorporate one or more isolated or other features including product mask circuit features likely to cause processing image induced defects into the test defect structure.

REFERENCES:
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patent: 4546652 (1985-10-01), Virkar et al.
patent: 4801869 (1989-01-01), Sprogis
patent: 6268717 (2001-07-01), Jarvis et al.
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patent: 6762434 (2004-07-01), Rumsey et al.
patent: 6783904 (2004-08-01), Strozewski et al.
patent: 6859746 (2005-02-01), Stirton
patent: 6883159 (2005-04-01), Schenker et al.
patent: 6917194 (2005-07-01), Fleischman et al.
patent: 2004/0232910 (2004-11-01), Ciplickas et al.
Semiconductor Product Yield Analysis Test Site; N.E. Hallas, R.F. Levine and C.H. Scriyner; IBM Technical Disclosure Bulletin, vol. 20, No. 8, Jan. 1978, p. 3099-3100.

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