Provision of FIFO buffer in RAM

Details Provision of FIFO buffer in RAM Provision of FIFO buffer in RAM

1994-12-15

1996-04-09

Fears, Terrell W.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523001, 36523009, G11C 1300

Patent

active

055067476

ABSTRACT:
FIFOs having various depths are provided in a RAM in a plurality of groups. For each group, stored numbers B and D determine a base address 2.sup.B in the RAM for the group and a depth 2.sup.D of each FIFO in the group. Each FIFO is identified by a respective FIFO identity having a most significant "1" bit whose position identifies the respective group of FIFOs, less significant bits identifying the respective FIFO in the group. A count C is provided which is common to all of the FIFOs for identifying a respective location in each FIFO. Each FIFO in the RAM is addressed with an address comprising a sum of the base address 2.sup.B, a product of said less significant bits multiplied by 2.sup.D, and a number C mod 2.sup.D, using the stored numbers B and D determined by the respective FIFO identity. The sum can be provided by an OR function.

REFERENCES:
patent: 5329629 (1994-07-01), Horst et al.

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