Providing an adder with a conversion circuit in a slack...

Details Providing an adder with a conversion circuit in a slack... Providing an adder with a conversion circuit in a slack...

2005-10-11

2005-10-11

Malzahn, D. H. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

06954773

ABSTRACT:
In one embodiment of the present invention, a high-speed adder is provided. This adder may incorporate a conversion circuit in a slack propagation timing path to provide for improved performance. The present invention may be incorporated into single or multi-bit adders.

REFERENCES:
patent: 4866658 (1989-09-01), Mazin et al.
patent: 5493524 (1996-02-01), Guttag et al.
patent: 5951630 (1999-09-01), Liu
patent: 6055557 (2000-04-01), Beck et al.
patent: 2003/0061253 (2003-03-01), Evans

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