Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-05-15
2009-10-13
Lebentritt, Michael S (Department: 2829)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S427000, C438S435000, C438S437000, C438S637000, C438S643000, C257SE21035, C257SE21233, C257SE21244, C257SE21551, C257SE21572
Reexamination Certificate
active
07601607
ABSTRACT:
An embodiment of the invention shows a process to form a damascene opening preferably without hardmask overhang or dielectric layer undercut/void. The low-k dielectric material can be sandwiched in two hardmask films to form the dielectric film through which an interconnect opening is etched. A first example embodiment comprises the following. We form a lower interconnect and an insulating layer over a semiconductor structure. We form a first hardmask a dielectric layer, and a second hardmask layer, over the lower interconnect and insulating layer. We etch a first interconnect opening in the first hardmask, the dielectric layer and the second hardmask layer. Lastly, we form an interconnect in the first interconnect opening.
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Hsia Liang Choo
Joy Raymond
Liu Wuping
Pal Shyam
Seah Boon Meng
Chartered Semiconductor Manufacturing Ltd.
Horizon IP Pte Ltd
Lebentritt Michael S
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