Multiplex communications – Wide area network – Packet switching
Patent
1988-11-03
1991-03-19
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
370 857, H04J 317, H04J 326
Patent
active
050017055
ABSTRACT:
A protocol control circuit for a data bus system in which data is communicated through a data bus and an acknowledgement signal is transmitted from a receiving unit through the data bus to a transmitting unit when data from the transmitting unit is received by the receiving unit. The protocol control circuit provides a buffer register unit including: a transmitting buffer register for storing at least one unit for data to be transmitted; an acknowledgement buffer register for storing the acknowledgement signal; and a selector connected to the transmitting buffer register and the acknowledgement buffer register. The selector carries out switching between the transmission of the output signal of the transmitting buffer register and the transmission of the output signal of the acknowledgement buffer register in correspondence with detection of proper timing of delivery of the acknowledgment signal.
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Edited by Investigation and Research Group on Development of Home Information System: "Introduction to Home Bus", pp. 15 to 23.
Kobatake Syozo
Ohwada Hideo
Shirai Hideaki
Yoshitomi Koji
Fujitsu Limited
Jung Min
Olms Douglas W.
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