Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2002-06-25
2003-12-30
Chaudhuri, Olik (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S703000, C257S705000
Reexamination Certificate
active
06670705
ABSTRACT:
The present invention relates to a semiconductor device comprising at least one first semiconductor layer and a second layer applied on at least a surface portion of the first layer for protecting the device, said protecting layer being of a second material having a larger energy gap between the valence band and conduction band than a first material forming said first layer.
All types of semiconductor devices are comprised, such as for example different types of diodes, transistors and thyristors. “Semiconductor device” is here to be interpretated very broadly and covers not only what is usually meant by this expression, but also integrated circuits and Multi Chip Module (MCM). Furthermore, “protecting” includes different type of protection, such as against high electric fields, moisture, mechanical damage, chemical reactions and so on, so that this word includes “insulating”, “passivating” and “protecting” as commonly used.
Accordingly, the present invention is neither restricted to passivation of a semiconductor device nor to any typical operation temperature of such a device, but the invention will hereinafter be particularly thoroughly discussed with respect to problems arising when passivating a semiconductor device adapted to operate at high temperatures for illuminating but not in any way limiting the present invention.
The passivation of the semiconductor device is made for different reasons and using different means and it is crucial for a reliable device operation. It may consist of one or several layers of the same or different insulator materials. The primary function of the passivation is to stabilise and to improve electronic or photo-electronic device performance characteristics. Another is to serve as passive coating protecting and isolating the device from the ambient environment, especially to prevent moisture and ion migration which may damage the semiconductor layer. For achieving this several demands are put simultaneously on a good passivation material: it should stabilise the surface region of the device often together with other measures applied to the semiconductor surface region itself. The other measures relate to different techniques used to control and reduce the electric field and leakage current by means of controlling the doping in the semiconductor surface region and sometimes also structural and chemical properties of the semiconductor surface or its topography. It should contribute in smoothing out and reducing the electric field created in the surface region of the device during its operation. It should prevent moisture and ionic species reaching the surface by presenting an efficient diffusion barrier. The chemical bonding between said second layer next to the semiconductor layer and the semiconductor layer should not introduce interfacial charge of its own and the insulator should be free from mobile charges and polarisation effects. If possible, the passivation should shield the device from electrical fields and charges created by electrostatic discharge in the surrounding ambient. The passivating layer should also provide mechanical protection of the device surface.
In order to do all this the material of the passivation layer should have a high resistivity and a high breakdown strength as well as a low density of shallow and deep level interfacial and bulk traps. Shallow centra act as doping levels and may reduce the resistivity of the layer and deep centers may give rise to quasi-permanent charging of the passivation layer.
The demands set on a protecting, passivating or insulating layer are especially severe in semiconductor devices intended for high temperature operation. Such a layer should have good adhesion to the substrate (semiconductor layer) and be structurally compatible with the substrate. The properties of the passivating layer should be: as little as possible dependent on the temperature in the operational temperature range. The layer should especially preserve high resistivity and high breakdown strength at high temperatures. Closely matched thermal expansion coefficients of the material of the semiconductor layer and that of the passivating layer are required to prevent build-up of stresses in the semiconductor. The protecting layer may also otherwise “let the grip” to the semiconductor layer go when the temperature changes and be at least partially released from the latter. The passivating layer should also be mechanically, thermally and chemically stable in the entire operational range of the device. Furthermore, the passivating layer should have a good thermal conduction. If such a passivating layer is also highly resistant to the environmental influence it could open possibilities of greatly simplifying the encapsulation issues by relieving the demands for hermetic packaging.
It would also be preferred that such a passivating layer may be produced at low process temperatures while allowing only low energy of particles, such as ions, photons or electrons, to hit the semiconductor layer during the deposition process.
Moreover, the present invention is directed to semiconductor devices of all types of semiconductor material as said first material, but it is particularly directed to obtaining a passivation adapted to SiC as such semiconductor material, so that especially the properties of SiC to withstand high temperatures and high breakdown fields may be utilised. For passivating semiconductor devices of SiC it is known to use thermal silicon dioxide in combination with a layer of silicon nitride or in combination with a thick layer of silicon dioxide created by CVD (Chemical Vapour Deposition). However, silicon dioxide is not a satisfactory passivation material for silicon carbide, especially not at high temperatures. This is due to two reasons. One is the relatively low ratio between breakdown field of silicon dioxide and silicon carbide which in combination with the relation between the dielectric constants of both materials, brings the electric field in silicon dioxide to only about a factor two lower than the critical breakdown field of the best quality silicon dioxides when the field in silicon carbide is close to its maximum value. The second is a relatively small energy barrier between the silicon carbide and the silicon dioxide, which increases the probability of charge injection. Both factors combine and lead to drastically reduce dielectric strength and reliability of the silicon dioxide at elevated temperatures. Furthermore, silicon dioxide grown on SiC is contaminated by unremoved carbon and it's structure is also probably disturbed by the volatile carbon compounds leaving the oxide during it's formation, like CO and CO
2.
Other materials than silicon dioxide, such as substantially monocrystalline AlN (PCT/SE95/01596), having a substantially monocrystalline structure have also been proposed for passivating SiC-devices. These materials have, however, a risk of build-up of stresses should the lattice match at the interface not be nearly perfect.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a semiconductor device of the type defined in the introduction, in which said protecting layer fulfils its function in a better way than such layers already known while to a large extent satisfying the demands put on such a layer mentioned above.
This object is according to the invention obtained by providing such a semiconductor device in which said second material has at least in one portion of said protecting layer a nano-crystalline and amorphous structure by being composed of crystalline grains with a size less than 100 nm and a resistivity at room-temperature exceeding 1×10
10
&OHgr;cm.
Said nano-crystalline and amorphous structure of the second material will facilitate structural adjustment of the protecting layer to said first semiconductor layer preventing occurrence of mechanical stresses being the cause of poor adhesion, of occurrence of high concentration of electronic interface states leading in turn to charging phenomena and instabilities and of reduced resistan
Bakowski Mietek
Harris Christopher
Szmidt Jan
Acreo AB
Brewster William M.
Chaudhuri Olik
Dilworth & Barrese LLP.
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