Protective coating for planarization

Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means

Reexamination Certificate

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Details

C438S424000, C438S427000, C257SE21546, C257SE21548, C257SE21230, C257SE21244, C257SE21206

Reexamination Certificate

active

07393789

ABSTRACT:
Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolidated into a single layer. Planarizing techniques using a filler layer and a protective layer are disclosed. Portions of an integrated circuit having different heights can be etched to a common plane.

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