Protective clamp for MOS gated devices

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Details

357 2313, 357 231, H01L 2978

Patent

active

048901431

ABSTRACT:
A self-protected MOS gated device includes a PN junction disposed in an electrical path between the source electrode and the gate contact of the device and integrally formed with a DMOS cell of the device to protect the DMOS cell from surge voltages. The PN junction has conductivity characteristics selected to provide junction breakdown at a predetermined voltage level and at a predetermined location along the junction.

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patent: 4617482 (1986-10-01), Matsuda
patent: 4656491 (1987-04-01), Igaraski

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