Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including passive device
Reexamination Certificate
2006-04-25
2006-04-25
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Including passive device
C438S398000, C438S901000
Reexamination Certificate
active
07033900
ABSTRACT:
In one embodiment, a first transistor is configured to switch ON to discharge accumulated charges on an interconnect line during a metallization process. This advantageously protects a second transistor, which is coupled to the interconnect line, from charge buildup. The gate of the first transistor may be coupled to the interconnect line by way of a coupling capacitor. The gate of the first transistor may remain floating during the metallization process, and subsequently coupled to ground at a topmost metal level. The metallization process may be physical vapor deposition, for example.
REFERENCES:
patent: 5963412 (1999-10-01), En
patent: 6281737 (2001-08-01), Kuang et al.
patent: 6538868 (2003-03-01), Chang et al.
patent: 6611453 (2003-08-01), Ning
patent: 2001/0026970 (2001-10-01), Eitan et al.
Cherukupalli Nagendra
Keswick Paul D.
Rekhi Sanjay
Cypress Semiconductor Corporation
Dang Phuc T.
Okamoto & Benedicto LLP
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