Protection of IGFET integrated circuits from electrostatic disch

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

357 65, 357 51, 357 41, 357 52, 357 2313, 357 236, H01L 2348

Patent

active

048210897

ABSTRACT:
Integrated circuits implemented in insulated gate (e.g., CMOS) technology have been protected from electrostatic discharge (ESD) by a metal gate field effect transistor. It has been recognized that a "parasitic" bipolar transistor exists in parallel with the metal gate device. Surprisingly, superior protection is obtained by omitting the metal gate, thereby relying only on the avalanche breakdown of the bipolar device for the opposite-polarity protection. It is postulated that the field effect of the metal gate device undesirably restricted the current flow in the prior art technique. The inventive technique may be advantageously implemented using a diode rather than a transistor as the protective element.

REFERENCES:
patent: 3555374 (1971-01-01), Usuda
patent: 3590340 (1971-06-01), Kokubunji-shi et al.
patent: 3673427 (1972-06-01), McCoy et al.
patent: 3676742 (1972-07-01), Russell et al.
patent: 4115709 (1978-09-01), Inoue et al.
patent: 4139935 (1979-02-01), Bertin et al.
patent: 4295176 (1981-10-01), Wittwer
Phillips Electronic Components and Materials Division, Philips Application Book, MOS Integrated Circuits and their Applications, 1970, (Eindhoven, NL), pp. 107-110, see FIG. 101; p. 107, chapter: "Avalanche Bulk Breakdown Device".
Patent Abstracts of Japan, vol. 8, No. 49, (E-230), (1486), 6 Mar. 1984 & JP, A, 58202573, (Fujitsu), 25 Nov. 1983, see abstract; FIG. 3.
M. S. Sze: "Physics of Semiconductor Devices", Second Edition, 1981, John Wiley and Sons, (New York, U.S.A.), pp. 193-195, see egun. 1,2.
IBM Technical Disclosure Bulletin, vol. 24, No. 7A, Dec. 1981, (New York, U.S.A.), F. H. DeLaMoneda et al.: "Layout for Lateral NPN Protective Device Enhancing Chip Wireability", pp. 3427-3430, see entire document.
The Effects of Electrostatic Discharge on Microelectronic Devices--A Review, William D. Greason, G. S. Peter Castle.
Electrical Overstress/Electronstatic Discharge Symposium Sponsored by the EOS/ESD Association and ITT Research Institute.
Commerically Available Integrated Circuit, See FIG. 1 and FIG. 2 attached.
Application Mark. S. Strauss, Case #1, Filed Sep. 30, 1985, Ser. No. 782,014.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Protection of IGFET integrated circuits from electrostatic disch does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Protection of IGFET integrated circuits from electrostatic disch, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Protection of IGFET integrated circuits from electrostatic disch will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-670143

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.