Protection of analog reference and bias voltage inputs

Details Protection of analog reference and bias voltage inputs Protection of analog reference and bias voltage inputs

1989-12-28

1993-06-08

Stephan, Steven L.

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific voltage responsive fault sensor

361 56, H02H 320, H02H 904

Patent

active

052185060

ABSTRACT:
A latchup and electrostatic discharge protection circuit for an analog reference or bias voltage power supply input connected between an input power providing terminal of the power supply and a power rail of a CMOS integrated circuit having a parasitic latch device. The protection circuit comprised of three field effect transistors close-circuits a path from the power supply input to the power rail for normal power supply conditions and open-circuits the path for excessively positive and negative voltages at the power supply input, thereby safeguarding the CMOS integrated circuit from currents resulting from the excessive positive and negative voltages.

REFERENCES:
patent: 4086642 (1978-04-01), Yoshida et al.
patent: 4110775 (1978-08-01), Festz
patent: 4385337 (1983-05-01), Aszno
patent: 4860148 (1989-08-01), Iwamura et al.
patent: 4922371 (1990-05-01), Gray et al.
patent: 4930037 (1990-05-01), Woo
patent: 4937700 (1990-06-01), Iwahashi

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