1989-04-05
1990-05-22
Edlow, Martin H.
357 233, 357 234, 357 238, 357 2311, H01L 2978
Patent
active
049281577
ABSTRACT:
A protection diode structure for a MOS transistor which includes a semiconductor substrate layer and a gate electrode insulated from the semiconductor substrate layer and in which a driving voltage is applied therebetween to create an inversion layer in an operating mode, includes a first semiconductor layer, a second semiconductor layer formed in the first semiconductor layer and connected to the gate electrode, and a third semiconductor layer formed to surround the first semiconductor layer, uniformly separated from the second layer, and connected to the semiconductor substrate layer, wherein the first and second semiconductor layers constitute a first diode having a breakdown voltage greater than the driving voltage and less than the gate withstand voltage of the MOS transistor, and the first and third semiconductor layers constitute a second diode having a breakdown voltage less than the gate withstand voltage of the MOS transistor. In this protection diode structure, the junction area of the second diode is set larger than that of the first diode by uniformly separating the third semiconductor layer from the second semiconductor layer. The semiconductor substrate layer and first semiconductor layer are formed of a first conductivity type and the second and third semiconductor layers are formed of a second conductivity type. Thus, the first PN junction diode is reversely biased by application of the drive voltage and the second PN junction diode is forwardly biased by application of the drive voltage.
REFERENCES:
patent: 4044373 (1977-08-01), Nomiya et al.
patent: 4400711 (1983-08-01), Avery
patent: 4402003 (1983-08-01), Blanchard
patent: 4595941 (1986-06-01), Avery
patent: 4803541 (1989-02-01), Kouda
patent: 4831424 (1989-05-01), Yoshida
Kimura Takashi
Matsunaga Taira
Edlow Martin H.
Kabushiki Kaisha Toshiba
Meier Stephen D.
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