Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1986-10-07
1988-10-04
Pellinen, A. D.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
361 91, 357 2313, 357 48, H02H 320
Patent
active
047759127
ABSTRACT:
Described is a protection device for power PNP transistors against the anomalous driving effect of parasitic transistors which are excited, under certain limit conditions, in bipolar type monolithic integrated circuits. The device is of simple integration and requires essentially the use of a PNP protection transistor connected with its emitter and collector respectively to the emitter or to a node at a higher potential than the latter and to the base of the PNP transistor to be protected and physically made on the chip in a position essentially adjacent to the PNP transistor to be protected.
REFERENCES:
patent: 4496849 (1985-01-01), Kotowski
patent: 4558286 (1985-12-01), Neidorff
Alzati Angelo
Menniti Pietro
Deboer Todd E.
Pellinen A. D.
SGS Microlelettronic S.p.A.
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