Protection circuit for protecting a semiconductor device from a

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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361 58, 361 91, 361111, 361118, 257355, 257532, H02H 904, H01L 2702

Patent

active

054774071

ABSTRACT:
An input protection circuit includes a conductor pattern extending from a first end connected to an input pad to a second end connected to an integrated circuit, first and second, mutually separated ground patterns disposed at both sides of the conductor pattern with a separation therefrom, a first gate pattern provided on a gap between the conductor pattern and the first ground pattern, and a second gate pattern provided on a gap between the conductor pattern and the second ground pattern, wherein the conductor pattern, the first ground pattern and the first gate pattern form a first transistor extending continuously from the first end to the second end of the conductor pattern at a first side of the conductor pattern, and wherein the conductor pattern, the second ground pattern and the second gate pattern form a second transistor extending continuously from the first end to the second end of the conductor pattern at a second side of the conductor pattern.

REFERENCES:
patent: 4807080 (1989-02-01), Clark
patent: 4821089 (1989-04-01), Strauss
patent: 4825280 (1989-04-01), Chen
patent: 5087955 (1992-02-01), Futami
patent: 5264723 (1993-11-01), Strauss
patent: 5345356 (1994-09-01), Pianka

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