Protection circuit and method from electrostatic discharge...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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Reexamination Certificate

active

06791632

ABSTRACT:

This application claims the benefit of Korean Patent Application No. 2001-41251, filed on Jul. 10, 2001, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit that protects thin film transistors (TFTs) of a liquid crystal display (LCD) device from electrostatic discharge.
2. Discussion of the Related Art
Cathode-ray tubes (CRTs) have been mainstream display devices for many applications. However, various flat panel display devices that are smaller, lighter, and consume less power have been developed. In particular, the thin film transistor liquid crystal display (TFT-LCD), which is very thin and possess excellent color characteristics, has been highly developed and has become commonplace.
Generally, a liquid crystal display device is a device for displaying images corresponding to data signals that are individually applied to pixels that are aligned in a matrix. The pixels control light transmittance to produce an image. Thus, a liquid crystal display device includes both a pixel matrix and driver integrated circuits (IC) for driving the pixels.
FIG. 1
is a cross-sectional view showing a partial cut-away view of a TFT-LCD display, and
FIG. 2
is a schematic circuit diagram showing a TFT-LCD. Hereinafter, the respective components will be described with reference to the drawings.
In the TFT-Array display, a TFT substrate (the lower substrate in
FIG. 1
) is formed with two or more metallic layers, an insulating layer, an amorphous silicone layer, an indium-tin-oxide (ITO) layer and other required elements are deposited on a glass substrate
102
to form a TFT
107
, a storage capacitor
108
, a pixel electrode
104
, and other structures to form an individual pixel. In addition, the TFT substrate includes data lines that interconnect multiple pixels to form a pixel matrix. Additionally, bonding pads
106
at the ends of respective data lines are used to applying data signals.
FIG. 1
also shows a color filter substrate (the upper substrate in
FIG. 1
) formed on a glass substrate
101
. The color filter substrate includes a black matrix
109
(beneficially formed of Cr) that selectively blocks light and RGB color filters
110
over respective pixels of the TFT substrate. Additionally, an ITO thin film
103
, which forms a common electrode, is deposited across the bottom of the color filter substrate.
On the substrates are alignment films
111
for aligning liquid crystal molecules in predetermined directions. The TFT and color filter substrates form a gap that is maintained uniformly by spacers
112
. Liquid crystal is disposed in the gap.
An electrical connection is formed between a voltage applying terminal of the TFT substrate and the ITO thin film
103
by silver dots
114
. This enables voltage to be applied to the common electrode (the ITO thin film
103
).
A patterned seal
113
positioned around the circumference of the substrates functions as an adhesive that fixes the TFT-Array substrate and the color filter substrate together. The seal
113
also maintains liquid crystal between the two substrates.
Referring now to
FIG. 2
, on the TFT substrate
102
are a plurality of data lines for transmitting data signals applied from a data driver integrated circuit
201
to the pixels, and a plurality of gate lines for transmitting gate signals applied from a gate driver integrated circuit
202
to the pixels. The data and gate lines are formed orthogonally. Bonding pads
106
(see
FIG. 1
) to which the data signals and the gate signals are applied are formed at end portions of the data and gate lines. The individual pixels are positioned near the crossings of the data and gate lines.
The gate driver integrated circuit
202
applies gate signals to the plurality of gate lines such that the pixels are selected line by line, while the data signals are applied to the pixels in the selected line.
The TFTs
107
(see
FIG. 1
) are used as switching devices and are formed in the individual pixels. When a gate signal is applied to the gate electrode of a TFT via a gate line, a conductive channel is formed between the source and drain electrodes of the TFT. Then, an applied data signal, which is applied to the TFT drain electrode via a data line, controls the light transmittance of that pixel.
Since the glass substrates
101
and
102
are insulators, static electricity generated during the fabrication process of the TFT-Array can collect on the glass. Also, static electricity can be generated by various treatments applied to the various substrates. Such static electricity can result in electrostatic-discharge damage to the TFT-Array. Furthermore, static electricity can cause dust particles to be attracted to the glass substrate, which can contaminate the TFT-Array and the color filter array.
To reduce static electricity, the fabrication equipments and the various process used to produce a TFT LCD can be treated to minimize static electricity. However, a well-designed TFT-Array still must incorporate protection against electrostatic-discharge.
Static electricity is a particular problem because the TFT devices used in the TFT-Array are prone to static damage because the gate insulating film can be easily destroyed by relatively energy levels. Therefore, to protect the TFT-Array the induction of static electricity in the gate and data lines must be prevented. One way of doing this is to electrically short the gate signal lines and the data signal lines together. For example, if static electricity is generated between a gate line and an adjacent data line, by making the 2 lines have an equipotential damage can be prevented.
While directly connecting the gate and data lines together is efficient, such direct connections prevent electrical testing to determine breaks in signal lines or defective TFTs. Furthermore, operational tests cannot be performed. Therefore, a protection circuit that protects against electrostatic-discharge damage but enables examination of the individual pixels has been developed. That protection circuit is comprised of elements located between respective gate lines and a gate shorting line, and between respective data lines and a data shorting line. The protection circuit is illustrated in FIG.
3
.
FIG. 3
shows a plurality of gate lines (G
1
through G
768
) that are formed on a substrate
102
in a row direction.
FIG. 3
also shows a plurality of data lines (D
1
through D
3072
) that are formed on the substrate
102
in a column direction. Also shown is a gate shorting line GSL, a data shorting line DSL, and the ITO layer that forms the common electrode. The gate shorting line receives a gate low level voltage (Vgl) while the data shorting line DSL receives a common voltage (Vcom).
FIG. 3
also shows a plurality of gate line ESD protection units, GESD
1
through GESD
768
and GLESD
1
through GLESD
768
, and a plurality of data line ESD protection units, DESD
1
through DESD
3072
and DLESD
1
through DLESD
3072
. The gate line ESD protection units connect the front ends of the gate lines G
1
through G
768
to the gate shorting line GSL, while the data line ESD protection units connect the front ends of the data lines D
1
through D
3072
to the data shorting line DSL. Additionally, ESD protection connection units CESD
1
and CESD
2
connect the gate shorting line GSL to the data shorting line DSL. Finally, ESD protection induction units IESD
1
and IESD
2
connect the data line ESD protection units DESD
1
and DESD
3072
to the ITO.
When an image is being produced, a low level voltage Vgl is applied to all of the gate lines, except the gate line that is currently being driven. That driven line receives a high gate voltage that turns on the TFTs connected to that line. Thus, the gate line voltage is either Vgl or a high gate voltage. Because the protection circuit shown in
FIG. 3
protects against high (static) voltages it is beneficial to connect the gate shorting line GSL to the gate low level voltage Vgl. That way, the pro

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