Protection circuit against electrostatic charge applied between

Details Protection circuit against electrostatic charge applied between Protection circuit against electrostatic charge applied between

1998-01-30

1999-09-14

Leja, Ronald W.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, H01L 2704, H02H 900

Patent

active

059531916

ABSTRACT:
Voltage clamping elements are respectively paired with first diodes, and the pairs of voltage clamping elements/first diodes are connected between a first common discharge line and power terminals selectively supplied with positive power voltage and ground voltage; however, the pairs of voltage clamping elements/first diodes can not prevent an internal circuit from excess voltage if a positive electrostatic pulse with respect to the positive power voltage is applied to the ground terminal; second diodes are connected between a second common discharge line and the terminals in such a manner as to discharge the positive electrostatic pulse through the associated forward-biased second diodes, and the internal circuit is perfectly prevented from the excess voltage.

REFERENCES:
patent: 5751051 (1998-05-01), Hayano
Kaoru Narita et al. "A Novel On-Chip Electrostatic Discharge (EDS) Protection for Beyond 500 MHz DRAM", IEEE, 1995, pp. 21.1.1-21.1.4, No Month.

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