Protected writing method for an integrated memory circuit and a

Static information storage and retrieval – Floating gate – Data security

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36518519, G11C 1134

Patent

active

057814708

ABSTRACT:
The present invention concerns a method for protecting a write operation of a memory cell within an integrated circuit that comprises the introduction of a random period (d1) between the reception of an external write command and the application of a physical variable to the memory cell so as to thwart the determination of the applied waveform characteristics as a function of time of this physical variable. The present invention also concerns an integrated circuit that comprises a memory whose write operation is protected according to this method. An application of the present invention is in the domain of chip carrying cards, i.e. smartcard applications.

REFERENCES:
patent: 4434478 (1984-02-01), Cook et al.
patent: 5046046 (1991-09-01), Sweha et al.
patent: 5206905 (1993-04-01), Lee et al.
patent: 5287469 (1994-02-01), Tsuboi

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