Boots – shoes – and leggings
Patent
1990-12-19
1994-02-01
Dixon, Joseph L.
Boots, shoes, and leggings
395400, 364DIG1, 3642683, 3642689, 3642734, 3642692, 371 66, 371 81, G06F 1200, G06F 1300
Patent
active
052838790
ABSTRACT:
A protected method of fast writing of information for at least one mass memory apparatus (DMM.sub.1) belonging to an information processing system including at least one central host (H.sub.1, H.sub.2), two control units (UC.sub.1, UC.sub.2) with independent electrical power supplies (ALIM.sub.1, ALIM.sub.2, BAT.sub.1, BAT.sub.2) connected to a first and second parallel bus (B.sub.1, B.sub.2) is disclosed wherein the method is characterized in that, if the host (H.sub.1, H.sub.2) is connected to each of the two buses via at least one first host adaptor (HA.sub.1, HA.sub.2) belonging to the first control unit (UC.sub.1, UC.sub.2) and the mass memory (D.sub.1 -D.sub.5) is connected to each of the two buses via a first and a second mass memory adaptor (DA.sub.1, DA.sub.2) belonging to the first and second control unit, respectively, which include a first and a second memory buffer (MTD.sub.1, MTD.sub.2), respectively,
I--the block of data to be written is memorized in the first host buffer (MTH.sub.1, MTH.sub.2) and memory buffer (MTD.sub.1, MTD.sub.2);
II--the first mass memory adaptor (DA.sub.1, DA.sub.2) reserves the mass memory (D.sub.1 -D.sub.5, D.sub.6 -D.sub.10);
III--the mass memory adaptor (DA.sub.1) then informs the host adaptor (HA.sub.1) of this, which host adaptor then sends an acknowledgement signal to the central host (H.sub.1);
IV--the operation of writing the block in its entirety is performed in the mass memory under the direction of the first mass memory adaptor (DA.sub.1) or the second, if the first is defective. The invention is applicable to mass memory subsystems.
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IBM Tech. Disclosure Bulletin, vol. 32, No. 2 Jul. 1989 (pp. 378-380).
Carteau Daniel
Schreck Philippe
Asta Frank J.
Bull S.A.
Dixon Joseph L.
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