Multiplex communications – Communication over free space – Combining or distributing information via code word channels...
Reexamination Certificate
1999-05-14
2003-12-23
Maung, Nay (Department: 2682)
Multiplex communications
Communication over free space
Combining or distributing information via code word channels...
C370S442000, C370S332000, C375S148000, C375S144000
Reexamination Certificate
active
06667964
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to propagation path estimation methods for a multi-stage type interference canceler applied to a DS-CDMA mobile communication and to interference elimination apparatuses, and more particularly to a propagation path estimation method for a multi-stage type interference canceler that eliminates interference by estimating a characteristic of a propagation path using a pilot symbol transmitted in a channel different from a data channel and subtracting a generated interference replica from a received signal, and to an interference elimination apparatus that eliminates the interference in such a manner.
In a DS-CDMA (Direct Sequence Code Division Multiple Access) mobile communication system, interference caused by multipath from other mobile stations (other user channels) is generated due to the cross correlation among spreading codes introduced by asynchronization between the mobile stations. Such interference causes the transmission quality and the channel capacity of the mobile communication system to deteriorate. For this reason, there is a need to realize an interference canceler, which can eliminate the interference from the received signal with satisfactory accuracy and to improve the signal-power-to-interference-power ratio (SIR).
FIG. 6
shows a diagram showing a conventional multi-stage type interference canceler. Each stage of the multi-stage type interference canceler includes interference canceler units (ICU)
51
and a combining unit (&Sgr;)
52
. As can be seen, such stages are successively connected in series.
FIG. 6
shows a case which the multi-stage type interference canceler includes a first stage
84
, second stage
86
, through mth stage
88
. Further, data symbol receivers
53
are included in the final mth stage
88
.
The interference canceler units
51
and the receivers
53
of the final stage are provided in parallel in correspondence with user channels. Subscripts to designations ICU
1,l
-ICU
1,k
, ICU
2,l
-ICU
2,k
, . . . of the interference canceler units
51
indicate the stage number and the user number corresponding to the user channel. Similarly, subscripts to designations ReC
m,l
through ReC
m,k
of the receivers
53
indicate the stage number and the user number corresponding to the user channel.
In the first stage
84
, a received signal Ro is input to each of the interference canceler units ICU
1,l
-ICU
1,k
corresponding to the user channels. The interference canceler units ICU
1,l
-ICU
1,k
respectively output symbol replica signals S
1,l
-S
1,k
and interference replica signals d
1,l
-d
1,k
. The combining unit
52
combines the interference replica signals d
1,l
-d
1,k
corresponding to the user channels to obtain a combined signal, and then outputs an error signal el of the first stage
84
by subtracting the combined signal from the received signal Ro.
In the second stage
86
, the error signal e
1
from the combining unit
52
of the first stage
84
and the symbol replica signals S
1,l
-S
1,k
from the interference canceler units ICU
1,l
-ICU
1,k
of the first stage are respectively input to the interference canceler units ICU
2,l
-ICU
2,k
. The interference canceler units ICU
2,l
-ICU
2,k
respectively output symbol replica signals S
2,l
-S
2,k
and interference replica signals d
2,l
-d
2,k
. The combining unit
52
combines the interference replica signals d
2,l
-d
2,k
corresponding to the user channels to obtain a combined signal, and then outputs an error signal e
2
of the second stage
86
by subtracting the combined signal from the error signal el of the first stage
84
.
In the final mth stage
88
, an error signal e
m−1
of a preceding (m−1)th stage and symbol replica signals Sm-
1,l
-Sm-
1,k
from the preceding (m−1)th stage are respectively input to the receivers ReC
m,l
-ReC
m,k
. The receivers ReC
m,l
-ReC
m,k
then eliminate the interference from these input signals so as to decode the data symbol. By successively repeating the interference elimination process at each of the stages, the error signals gradually become smaller. Therefore, it is possible to obtain symbol replica signals without interference among the users or the like.
FIG. 7
is a diagram showing a conventional interference canceler unit. The interference canceler unit (ICU)
51
includes despreading processors
61
, a combining unit
62
, a decision unit
63
, spreading processors
64
, and a combining unit
65
. The despreading processors
61
each include a despreader
61
-
1
, an adder
61
-
2
, a multiplier
61
-
3
and a propagation path estimation circuit
61
-
4
. The spreading processors
64
each include a multiplier
64
-
1
, an adder
64
-
2
and a respreader
64
-
3
.
The number of despreading processors
61
and spreading processors
64
respectively correspond to the number of received delayed waves, that is, the number of the paths (propagation paths) to be multiplexed.
FIG. 7
shows a case where three despreading processors
61
and three spreading processors
64
are provided in parallel. In
FIG. 7
, a subscript i (in this example, i=1 to 3) indicates the signals corresponding to the different paths. The signals corresponding to the different paths are often referred to as RAKE fingers.
An error signal e
j−1
from a preceding stage (the received signal Ro in the case of a first stage) and symbol replica signals S
j−1,l
-S
j−1,k
of the preceding stage (zero in the case of the first state) are input to the despreading processor
61
, where j denotes the stage number. The despreader
61
-
1
carries out a despreading and demodulation with respect to the error signal e
j−1
of the preceding stage (the received signal Ro in the case of the first stage) using a spreading code.
The despread and demodulated signal, and one symbol replica signals S
j−1,l
-S
j−1,k
of the preceding state (zero in the case of the first stage) are combined by the adder
61
-
2
to produce a received symbol Ri. The received symbol Ri is then input to the propagation path estimation circuit
61
-
4
. The propagation path estimation circuit
61
-
4
estimates the characteristic of the corresponding propagation path using a pilot symbol shown in FIG.
7
and then outputs a propagation path estimation value &xgr;i{circumflex over ( )} for each path.
By multiplying a complex conjugate &xgr;
i
{circumflex over ( )}* of the propagation path estimation value &xgr;
i
{circumflex over ( )} to the signal Ri in the multiplier
61
-
3
, a received symbol is produced, which is eliminated of a phase error caused by the effects of the propagation path.
The output signals of the multipliers
61
-
3
for each of the paths are subjected to a diversity composing in the combining unit (&Sgr;)
62
. A diversity combined received symbol &Sgr;R
i
&xgr;
i
{circumflex over ( )}* is compared with a threshold value in the decision unit
63
, where a data symbol is provisionally decided.
The signals generated and output from the despreading processors
61
will be referred to as replica generation signals. The replica generation signals are converted into symbol replica signals and interference replica signals in the spreading processors
64
, which are then transmitted to the next stage.
A provisionally decided data symbol Zŝ output from the decision unit
63
is branched in correspondence with the different paths. Further, the propagation path estimation value &xgr;
i
{circumflex over ( )} is multiplied by the multiplier
64
-
1
of each of the spreading processors
64
. Therefore, the provisionally decided data symbol Zŝ is again decomposed into the signals corresponding to the channels, and transmitted to the next stage as symbol replica signals S
j,l
-S
j,k
.
In addition, the symbol replica signals S
j,l
-S
j,k
corresponding to each path are output from the multiplier
64
-
1
and one of the symbol replica signals S
j−1,l
-S
j−1-,k
from the preceding stage are input to the adder
64
-
2
. The adder
64
-
2
outputs the difference betwe
Seki Hiroyuki
Tanaka Yoshinori
Katten Muchin Zavis & Rosenman
Lee John J
Maung Nay
LandOfFree
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