Prolog interrupt processing

Details Prolog interrupt processing Prolog interrupt processing

1992-06-01

1995-03-07

Kriess, Kevin A.

Boots, shoes, and leggings

3642302, 3642641, 364DIG1, G06F 1324, G06F 1100

Patent

active

053966325

ABSTRACT:
An improved architecture for a Prolog interpreter/compiler is described to facilitate interrupt processing. The new architecture employs interrupt control words and a set of interrupt control blocks to enhance Prolog processing. As interrupts are detected, an interrupt control word is loaded with the address of an interrupt control block for managing interrupt processing. Then, each time a new predicate is fired, the interrupt control word is tested and control is passed to the interrupt processing routine if the control word is non-zero.

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"Soft Stopping for System Processors, IBM Technical Disclosure Bulletin", vol. 27, No. 10B, Mar. 1985, pp. 6036-6037.
"Picocode Interrupt Mechanism", IBM Tchnical Disclosure Bulletin, vol. 27, No. 10B, Mar. 1985, p. 6045.
David H. D. Warren, "Implementing Prolog", DAI Research Report No. 39, vol. I, May 1977.
Gabriel et al., "A Tutorial on the Warren Abstract Machine For Computational Logic", Argonne National Library, Jun. 1985.

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