Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Patent
1996-07-25
1997-09-16
Brown, Peter Toby
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
257762, 257763, 257766, 257775, H01L 2943, H01L 2350
Patent
active
056684100
ABSTRACT:
A projecting electrode structure, having an electrode provided on a substrate, a first conductive layer provided on the electrode, an insulating projection provided at the center of the upper surface of the first conductive layer, the projection having the largest size smaller than the size of the upper surface, and a second conductive layer covering the surface of the projection and that part of the first conductive layer surrounding the projection and being electrically connected to the first conductive layer. A process for forming a projecting electrode includes the steps of providing the first conductive layer by vacuum deposition or spattering, providing the projection by photolithography, and providing the second conductive layer by vacuum deposition or spattering. This process eliminates the need for electroplating for forming the projecting electrode. It does not have a disadvantage in electroplating using a plating solution such as a defective appearance in a projecting electrode caused by air bubbles from the plating solution.
REFERENCES:
patent: 4922321 (1990-05-01), Arai et al.
patent: 4980555 (1990-12-01), Hartley et al.
patent: 5079420 (1992-01-01), Turnbull
Brown Peter Toby
Casio Computer Co. Ltd.
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