Programming verification method of nonvolatile memory cell,...

Details Programming verification method of nonvolatile memory cell,... Programming verification method of nonvolatile memory cell,...

2006-01-31

2006-01-31

Tran, Michael (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185200

Reexamination Certificate

active

06992933

ABSTRACT:
A method of verifying programming of a nonvolatile memory cell to a desired state, the method comprising the steps of: selecting first and second references respectively corresponding to first and second voltages; applying a programming voltage to the memory cell; sensing a threshold voltage level of the memory cell; and comparing the sensed threshold voltage level with the first and second references and, in the case where the threshold voltage level is higher than the first reference and lower than the second reference, indicating that the memory cell is programmed into the desired state, wherein the nonvolatile memory cell includes a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region formed below the gate electrode, a source and a drain as diffusion regions formed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having the function of retaining charges.

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