Programming of a flash memory cell

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185190, C365S185330

Reexamination Certificate

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06937518

ABSTRACT:
A method of programming a memory device comprises applying a first programming voltage to one of a plurality of wordlines, corresponding to a cell to be programmed. The first programming voltage is substantially equal to the desired threshold voltage. A second programming voltage is also applied to one of a plurality of bitlines, corresponding to the cell to be programmed. The second programming voltage gradually increases from a low level toward a high level. The first programming voltage and second programming voltage are removed when the corresponding bitline current begins to decrease.

REFERENCES:
patent: 5553020 (1996-09-01), Keeney et al.
patent: 5973959 (1999-10-01), Gerna et al.
patent: 6269023 (2001-07-01), Derhacobian et al.
patent: 6288934 (2001-09-01), Aikawa
patent: 6404679 (2002-06-01), Guedj
patent: 6714448 (2004-03-01), Manea

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