Programming non-volatile memory devices

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185030, C365S185190, C365S185240, C365S230080

Reexamination Certificate

active

06700820

ABSTRACT:

BACKGROUND
The present invention relates to methods for programming non-volatile memory devices.
Non-volatile semiconductor memory is a fundamental building block for a typical computer system. One type of non-volatile semiconductor memory device is the multi-level electrically-erasable programmable read-only memory (“multi-level EEPROM”).
Some memory cells store a signal representing one bit of information. Such memory cells may be placed in either of two states, each representing one of the binary elements “1” or “0.”
In contrast, multi-level cells can store signals representing more than one bit and may be placed into any one of more than two states. Each state corresponds to a pattern of bits and the different states of the cell are distinguished by unique voltage threshold levels.
“Programming” means placing the multi-level memory cell into one of the multi-level memory cell's possible states. Programming may be accomplished by pulsing the multi-level memory cell with a pulse of predetermined voltage and duration. A device that supplies the pulsed power is called a “program pump,” and the number of cells that can be a programmed at one time is referred to as “programming bandwidth.”


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