Programming method of non-volatile memory device

Details Programming method of non-volatile memory device Programming method of non-volatile memory device

2009-05-07

2011-11-01

Tran, Michael (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185240

Reexamination Certificate

active

08050088

ABSTRACT:
A programming method of a non-volatile memory device having a drain select transistor, a source select transistor, and a plurality of memory cells connected between the drain select transistor and the source select transistor includes applying a program voltage, which increases stepwise according to a repetition of a program cycle, to a selected memory cell and applying a pass voltage, which decreases in inverse proportion to change of the program voltage, to some of unselected memory cells.

REFERENCES:
patent: 5677873 (1997-10-01), Choi et al.
patent: 5715194 (1998-02-01), Hu
patent: 5991202 (1999-11-01), Derhacobian et al.
patent: 6061270 (2000-05-01), Choi
patent: 2007/0258286 (2007-11-01), Higashitani
patent: 2008/0049494 (2008-02-01), Aritome
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Jan. 12, 2011.

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