Static information storage and retrieval – Floating gate – Particular biasing
Patent
1995-03-28
1996-04-16
Nguyen, Tan T.
Static information storage and retrieval
Floating gate
Particular biasing
365218, 365201, G11C 2900
Patent
active
055089593
ABSTRACT:
A programming method for flash erasable programmable memory devices (flash EPROMs) comprises a first step of erasing the array of cells, then applying a control gate voltage to access a number of control gates. Any number of control gates can be accessed, but accessing four or eight control gates may have advantages. Regardless of the number of control gates accessed, a digit line voltage is applied to access one of the digit lines, which activates a number of cells. The digit line voltage is sensed for a voltage drop, which indicates the presence of at least one over-erased activated cell. If a digit line voltage drop is detected, a sense voltage is applied to each of the activated cells to determine which is over-erased. A heal voltage is applied to the over-erased cell for an interval of time to store electrons on the floating gate of the over-erased cell. The sense voltage is applied to the over-erased cell to determine if the cell remains over-erased, and if the cell remains over-erased the heal voltage is again applied to the over-erased cell. The sense voltage is then applied to the over-erased cell to determine if it remains over-erased.
REFERENCES:
patent: 4279024 (1981-07-01), Schrenk
patent: 5233562 (1993-08-01), Ong et al.
patent: 5237535 (1993-08-01), Mielke
patent: 5424993 (1995-06-01), Lee et al.
Gonzalez Fernando
Lee Roger R.
Martin Kevin D.
Micro)n Technology, Inc.
Nguyen Tan T.
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