Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1988-08-01
1989-08-15
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307468, 307473, 371 25, H03K 19177
Patent
active
048577731
ABSTRACT:
A programmable logic device includes an AND plane and an OR plane associated with the AND plane. At least one of the AND and OR planes includes an array of programmable memory elements which can be selectively programmed to define a desired logic function. In one form, a function cell designed for providing one of a predetermined functions, such as a counter or shift register function, selectively is provided. In another form, a driver circuit connected to a pair of input lines has a first state in which one of the paired input lines serves as an inverting input line and the other as a non-inverting input line and a second state in which both of the paired input lines are set at low level. In a further form, two pairs of input lines of the AND plane are connected to an input or input/output terminal of the device. In a still further form, the AND plane further includes a plurality of test input lines each associated with the corresponding one of the product term lines of the AND plane, and an three-state output buffer is connected between the OR plane and a device output terminal, whereby the output buffer is enabled by a logical sum between a selected product term from the AND plane and an internally supplied test mode signal.
REFERENCES:
patent: 4366393 (1982-12-01), Kasuya
patent: 4525714 (1985-06-01), Still et al.
patent: 4529895 (1985-07-01), Garverick et al.
patent: 4625311 (1986-11-01), Fitzpatrick et al.
patent: 4672610 (1987-06-01), Salick
patent: 4768196 (1988-08-01), Jou et al.
patent: 4771285 (1988-09-01), Agrawal et al.
patent: 4780628 (1988-10-01), Illman
patent: 4791602 (1988-12-01), Resnick
Prestopnik, "Testing Embedded Arrays", IBM T. D. B., vol. 22, No. 8A, Jan. 1980, pp. 3177-3178.
Cassani et al., "Defect Diagnostic Circuit Utilizing Functional Arrays", IBM T. D. B., vol. 17, No. 12, May 1975, pp. 3539-3540.
Funatsu et al., "Designing Digital Circuits with Easily Testable Consideration" Semiconductor Test Conference, Cherry Hill, N.J., USA, 31 Oct.-2 Nov., 1978, pp. 98-102.
Fujii Koichi
Takata Akira
Hudspeth David
Ricoh Co. Ltd.
LandOfFree
Programming logic device with test-signal enabled output does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Programming logic device with test-signal enabled output, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programming logic device with test-signal enabled output will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-123661